This flip-flop is triggered on the rising edge of the clock signal.

这个触发器在时钟信号的上升沿时被激活。

Radiation-hardened octal D-flip-flop with clear.

抗辐射具有明确的八进制D型触发器。

The application of this type of double-edge-triggered flip-flop in seq…

文章还介绍了该双边沿触发器在时序电路中的应用。

Based on ternary D - type flip-flop , a low - power ternary clock - gating D - type flip-flop is proposed.

本文在三值D型触发器的基础上提出了一种低功耗三值门控时钟D型触发器的设计。

D flip - flop with the main design of the timing circuit.

D触发器的设计主要用在时序电路中.

To reduce power dissipation of D flip- flops by means of simplifying its configuration, a new design of semi - static D flip-flop is proposed.

本文从简化触发器内部锁存器结构以降低功耗的要求出发，提出了一种新型的半静态D触发器设计。

Flip-flop silhouette with an upper of transparent TPU for unique appeal.

触发器的剪影与上层的透明TPU独特的吸引力。

This paper studies the application of direct set and reset terminals of a flip-flop.

本文研究了触发器直接置位复位端的各种应用。

This DET flip-flop is proved having a complete logic function shown by PSPICE simulation.

该触发器已用PSPICE程序模拟验证了具有完整的功能。

This DET flip - flop is proved having a complete logic function shown by PSPICE simulation.

该触发器已用PSPICE程序模拟验证了具有完整的功能.